Generally, the SoCs have complex integration processes for deployment purposes. Even if the integration is simple then there is a compromise with the performance factor of the device. Tibbo Technology’s Plus1 SP7021 SoC ensures simple integration with efficient performance comparable with Linux-capable processing. Also, the I/O ports for easy interfacing make it a good fit for IoT applications.
Plus1 SP7021 SoC comes with multi-core processors and up to 512MB of DDR3 memory with I/O ports in a single LQFP package. Also, the core includes quad-core ARM Cortex-A7 working up to 960MHz with NEON multimedia processing engine for multimedia applications. It comes with an ARM926 real-time core with an operating frequency of 202 MHz. It also features a low-power 8051 with selectable operating speeds.
GPIO ports include nine 8-bit ports (P0-8) out of which P1-8 are 5V-tolerant. All the GPIO lines of Plus1 SP7021 SoC have 3.3V logic levels along with 16mA source/sink current for all lines of port 0. It features 8 separate interrupt lines that can be configured as wake-up lines of the chip. Also, each GPIO line can be individually tri-stated to work as an input or enabled to work as outputs. There are two ways of controlling GPIO lines through the 8-bit registers or by using the bitwise access to individual lines.
- Easy-to-use 20x20mm LQFP176-EP package
- Quad-core ARM Cortex-A7 (CA7) with 16KB L1 I-cache and 16KB L1 D-cache and 512KB unified L2 cache
- ARM926 real-time core with 16KB I/D cache and 32KB L1 I-cache and 32KB L1 D-cache
- 8051 low-power core with Intended to be used as a supervisory core with 500uA consumption for IC.
- Single 3.3V power with on-device regulators for 1.5V, 1.2V, and 0.9V power
- DDR3 DRAM with SP7021-IS: 128MB and SP7021-IF: 512MB
- General-purpose I/O (GPIO) ports
- Dual PinMuxable Ethernet MACs with support for half and full-duplex communications
- Five UARTs include Four PinMuxable Enhanced UARTs, one fixed console UART (TX and RX lines only) in P0, and also Baudrates up to 921,600bps
- Flash interface comes with eMMC, SPI NAND, and SPI NOR memories and supports BCH error correction
- Four PinMuxable SPI modules
- Up to four 8-bit or up to two 16-bit PinMuxable timers/counters
- Four PinMuxable capture modules
- MIPI video interface supports resolutions up to 1366×768/1312×816
- HDMI 1.4 video interface supports resolutions up to 720p
- TFT LCD controller with parallel bus interface (res. up to 320x240x24)
- I2S/SPDIF/PWM audio output for up to five channels
- PDM interface for 8-channel MEMS microphone array
- 32-bit FPGA bus IO (FBIO) interface
- Temperature sensor for estimating the internal temperature of the IC
- Real-time clock (RTC) with alarm function with a dedicated output pin and backup power input
- 128-byte one-time programmable (OTP) memory with 64 bytes are available to the user
- SWD and JTAG debug interfaces
- Watchdog timer
- Secure boot with boot image verified by ED25519 algorithm
- Crypto engines include PKA engine (RSA), Hash engine (SHA3, MD5), and Encryption/decryption engine (AES)