TIBBO TECHNOLOGY’S PLUS1 SP7021 SOC WITH LINUX-CAPABLE PROCESSING

Summary of TIBBO TECHNOLOGY’S PLUS1 SP7021 SOC WITH LINUX-CAPABLE PROCESSING


Tibbo Technology’s Plus1 SP7021 SoC offers Linux-capable processing with simple integration and I/O-rich interfacing for IoT. It combines a quad-core ARM Cortex-A7, an ARM926 real-time core, and a low-power 8051 supervisory core, up to 512MB DDR3, multiple GPIOs, Ethernet MACs, UARTs, SPI, timers, MIPI/HDMI video, audio interfaces, secure boot, and crypto engines in a 20x20mm LQFP176-EP package.

Parts used in the Plus1 SP7021 SoC:

  • Plus1 SP7021 System on Chip (SoC)
  • Quad-core ARM Cortex-A7 cores
  • ARM926 real-time core
  • 8051 low-power supervisory core
  • DDR3 DRAM (128MB for SP7021-IS, 512MB for SP7021-IF)
  • LQFP176-EP 20x20mm package
  • General-purpose I/O (GPIO) ports P0–P8
  • Dual PinMuxable Ethernet MACs
  • Five UARTs (four PinMuxable enhanced UARTs and one fixed console UART)
  • eMMC, SPI NAND, SPI NOR flash interfaces with BCH error correction
  • Four PinMuxable SPI modules
  • PinMuxable timers/counters and capture modules
  • MIPI video interface
  • HDMI 1.4 video interface
  • TFT LCD controller with parallel bus
  • I2S, SPDIF, PWM audio outputs
  • PDM interface for MEMS microphone array
  • 32-bit FPGA bus IO (FBIO) interface
  • On-device voltage regulators (1.5V, 1.2V, 0.9V) with single 3.3V power
  • Temperature sensor
  • Real-time clock with alarm and backup power input
  • 128-byte one-time programmable (OTP) memory
  • SWD and JTAG debug interfaces
  • Watchdog timer
  • Secure boot with ED25519 verification
  • Crypto engines: PKA (RSA), Hash (SHA3, MD5), AES encryption/decryption

Generally, the SoCs have complex integration processes for deployment purposes. Even if the integration is simple then there is a compromise with the performance factor of the device. Tibbo Technology’s Plus1 SP7021 SoC ensures simple integration with efficient performance comparable with Linux-capable processing. Also, the I/O ports for easy interfacing make it a good fit for IoT applications.

Plus1 SP7021 SoC comes with multi-core processors and up to 512MB of DDR3 memory with I/O ports in a single LQFP package. Also, the core includes quad-core ARM Cortex-A7 working up to 960MHz with NEON multimedia processing engine for multimedia applications. It comes with an ARM926 real-time core with an operating frequency of 202 MHz. It also features a low-power 8051 with selectable operating speeds.

GPIO ports include nine 8-bit ports (P0-8) out of which P1-8 are 5V-tolerant. All the GPIO lines of Plus1 SP7021 SoC have 3.3V logic levels along with 16mA source/sink current for all lines of port 0. It features 8 separate interrupt lines that can be configured as wake-up lines of the chip. Also, each GPIO line can be individually tri-stated to work as an input or enabled to work as outputs. There are two ways of controlling GPIO lines through the 8-bit registers or by using the bitwise access to individual lines.

Technical Specifications

  • Easy-to-use 20x20mm LQFP176-EP package
  • Quad-core ARM Cortex-A7 (CA7) with 16KB L1 I-cache and 16KB L1 D-cache and 512KB unified L2 cache
  • ARM926 real-time core with 16KB I/D cache and 32KB L1 I-cache and 32KB L1 D-cache
  • 8051 low-power core with Intended to be used as a supervisory core with 500uA consumption for IC.
  • Single 3.3V power with on-device regulators for 1.5V, 1.2V, and 0.9V power
  • DDR3 DRAM with SP7021-IS: 128MB and SP7021-IF: 512MB
  • General-purpose I/O (GPIO) ports
  • Dual PinMuxable Ethernet MACs with support for half and full-duplex communications
  • Five UARTs include Four PinMuxable Enhanced UARTs, one fixed console UART (TX and RX lines only) in P0, and also Baudrates up to 921,600bps
  • Flash interface comes with eMMC, SPI NAND, and SPI NOR memories and supports BCH error correction
  • Four PinMuxable SPI modules
  • Up to four 8-bit or up to two 16-bit PinMuxable timers/counters
  • Four PinMuxable capture modules
  • MIPI video interface supports resolutions up to 1366×768/1312×816
  • HDMI 1.4 video interface supports resolutions up to 720p
  • TFT LCD controller with parallel bus interface (res. up to 320x240x24)
  • I2S/SPDIF/PWM audio output for up to five channels
  • PDM interface for 8-channel MEMS microphone array
  • 32-bit FPGA bus IO (FBIO) interface
  • Temperature sensor for estimating the internal temperature of the IC
  • Real-time clock (RTC) with alarm function with a dedicated output pin and backup power input
  • 128-byte one-time programmable (OTP) memory with 64 bytes are available to the user
  • SWD and JTAG debug interfaces
  • Watchdog timer
  • Secure boot with boot image verified by ED25519 algorithm
  • Crypto engines include PKA engine (RSA), Hash engine (SHA3, MD5), and Encryption/decryption engine (AES)

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Quick Solutions to Questions related to Plus1 SP7021 SoC:

  • What cores are included in the Plus1 SP7021 SoC?
    The SoC includes a quad-core ARM Cortex-A7, an ARM926 real-time core, and a low-power 8051 supervisory core.
  • How much DDR3 memory does the Plus1 SP7021 support?
    SP7021-IS supports 128MB DDR3 and SP7021-IF supports 512MB DDR3.
  • Does the Plus1 SP7021 support secure boot?
    Yes, it supports secure boot with boot image verification using the ED25519 algorithm.
  • What video interfaces are available on the Plus1 SP7021?
    It provides a MIPI video interface (up to 1366x768/1312x816), HDMI 1.4 (up to 720p), and a TFT LCD controller with parallel bus.
  • Can the Plus1 SP7021 handle audio and microphone arrays?
    Yes; it offers I2S/SPDIF/PWM audio outputs for up to five channels and a PDM interface for an 8-channel MEMS microphone array.
  • How are GPIOs implemented on the Plus1 SP7021?
    There are nine 8-bit GPIO ports (P0–P8) with 3.3V logic; P1–P8 are 5V-tolerant, lines can be tri-stated, and controlled via 8-bit registers or bitwise access.
  • What flash memory interfaces does the Plus1 SP7021 support?
    It supports eMMC, SPI NAND, and SPI NOR flash interfaces with BCH error correction.
  • Are there hardware security and crypto features in the Plus1 SP7021?
    Yes; it includes crypto engines such as a PKA engine for RSA, a Hash engine for SHA3 and MD5, and an AES encryption/decryption engine.
  • What package and power options does the Plus1 SP7021 use?
    It comes in a 20x20mm LQFP176-EP package and uses single 3.3V power with on-device regulators for 1.5V, 1.2V, and 0.9V.
  • Does the Plus1 SP7021 include debugging interfaces?
    Yes; it includes SWD and JTAG debug interfaces.

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