Summary of Simple RF/Microwave Frequency Counter using PIC16F876A
The project implements a frequency counter using a PIC16F876A MCU, combining internal timers with external 74Fxxx flip-flops for high-speed input counting, achieving up to ~200 MHz. TMR0 provides a 100 µs timebase for gate timing and overflow checking; TMR1 plus external 4 flip-flop stages yield a 36-bit counter (32 bits used). Three resolutions and optional divide-by-64 prescaler are supported. Results are converted to decimal and shown on a 2x16 HD44780 LCD. External fast transistor and schottky diode improve high-frequency performance.
Parts used in the Counter:
- PIC16F876A microcontroller
- 74F50109 dual J/K flip-flop (two J/K flip-flop inputs for first two stages)
- 74F74 dual D flip-flop (used for third and fourth stages)
- Pull-up resistors (for TTL flip-flop outputs to PIC ports RC0–RC3)
- 2N3960 fast switching transistor
- 1N5712 Schottky diode
- Divide-by-64 prescaler (optional, external)
- HD44780-compatible 2x16 character LCD module
- Current-limiting resistors for LCD backlight (two 10 ohm resistors)
- 20 MHz clock/reference (system clock for PIC)
2. Counter
The whole counter design is based on the PIC micro-controller 16F876A. The latter includes several peripherals and just a few of them are used in this project. The most important in this project are two internal, hardware counters/timers called TMR0 and TMR1. The TMR0 timer generates very precise interrupts every 100 microseconds (10kHz) from the 20MHz clock/reference. All required timings for the counter timebase are simply integer multiples of this basic period.
The TMR1 is used as a 16-bit (binary) input-signal counter. Its maximum counting frequency is just around 16.7MHz. Therefore, the first four flip-flops of the input-signal-counter chain are added externally as 74Fxxx-logic devices. The first two stages use one of the fastest 74Fxxx-series devices, the 74F50109 dual J/K-flip-flop. Further, the 74F50109 is also specified as metastable-immune and is therefore the ideal component for the counter gate.
A more conventional 74F74 dual D-flip-flop is used in the third and fourth stages. The TTL flip-flops require pull-up resistors to drive the PIC ports RC0, RC1, RC2 and RC3. RC0 is used as a clock input to the TMR1 at the same time. Replacing the 74F74 with a 74ACT74 could save some current and two pull-up resistors. The 74F50109 has the same pin-out and logical function as the 74F109, but the latter has a lower frequency limit and is not specified metastable-free.
The typical frequency limit of the 74F50109 is specified 150MHz. Driving the 74F50109 with a fast switching transistor 2N3960 (ft=1.6GHz) and a schottky diode 1N5712 to prevent saturation, reliable counting can be achieved up to 190-200MHz! Unlike conventional AND or OR gates, the J/K gate minimizes the jitter of the counting result (wandering of the last digit) regardless of the input signal. Since the /K input of the 74F50109 is inverted, two port pins (RA2 and RA3) of the PIC are required to drive the J and /K inputs with minimal skew.
On the other end, the counter needs to be extended beyond the 4 bits of the 74Fxxx logic and 16 bits of the TMR1 adding up to 20 bits of resolution. To avoid disrupting the operation of the main 100us timer, the TMR1 is not allowed to generate interrupts. The TMR1 overflow (interrupt) flag is checked during every 100us (TMR0)interrupt. The overflows are counted in two additional 8-bit registers. The overall counter resolution is therefore 36 bits.
These 36 bits are truncated to 32 bits, the upper 4 bits are not used. 32 bits allow counting beyond 400MHz with a resolution of 0.1Hz (gate time 10s). None of these counters is ever being reset! The counter value at the beginning of the measurement is stored and subtracted from the end value. Finally, the 32-bit binary result is converted to a 10-digit decimal number and the latter is displayed with the leading zeros blanked, decimal point and units (MHz or kHz).
The basic counter software allows three resolutions (selected with RC4 and RC5): 10Hz, 1Hz and 0.1Hz in direct counting mode (no prescaler), corresponding to gate times of 100ms, 1s and 10s. When used with a divide-by-64 prescaler, the three available resolutions become 1kHz, 100Hz and 10Hz, corresponding to gate times of 64ms, 640ms and 6.4s. All these gate times are obtained by counting the 100us (10kHz TMR0) interrupts.
The PIC 16F876A drives a standard LCD module with a HD44780 controller and a resolution of two rows of 16 characters each. The HD44780 requires 8 data lines (port B of the 16F876A) and three control signals: RegisterSelect (RC6), Read/Write (GND) and Enable (RC7). Since the data presented on the 8-bit-wide output port RB0-7 is only written to the HD44780, the R/W input is hardwired to ground (/Write). The LCD back-light LEDs are supplied through two 10ohm current-limiting resistors.
For more detail: Simple RF/Microwave Frequency Counter using PIC16F876A
- What microcontroller is used in the counter?
The PIC16F876A microcontroller is used in the project. - How is the timebase generated for measurements?
TMR0 inside the PIC generates interrupts every 100 microseconds (10 kHz) from the 20 MHz clock to form the timebase. - How many input flip-flop stages are added externally and which ICs are used?
Four external flip-flop stages are added: the first two use 74F50109 dual J/K flip-flops and the third and fourth use a 74F74 dual D flip-flop. - Why is 74F50109 chosen for the first stages?
Because it is fast (typical limit 150 MHz), specified as metastable-immune, and minimizes counting jitter. - How is counting extended beyond the PIC TMR1 width?
TMR1 (16-bit) plus four external flip-flop bits give 20 bits; TMR1 overflow flags are counted in two additional 8-bit registers, yielding a 36-bit internal counter, truncated to 32 bits for measurements. - Does TMR1 generate interrupts for overflows?
No; TMR1 is not allowed to generate interrupts. The TMR1 overflow flag is checked during every 100 microsecond TMR0 interrupt. - What measurement resolutions and gate times are supported without prescaler?
Direct counting mode supports resolutions of 10 Hz, 1 Hz, and 0.1 Hz corresponding to gate times of 100 ms, 1 s, and 10 s. - What resolutions are available when using the divide-by-64 prescaler?
With the divide-by-64 prescaler the resolutions become 1 kHz, 100 Hz, and 10 Hz corresponding to gate times of 64 ms, 640 ms, and 6.4 s. - How are results displayed?
The PIC converts the 32-bit binary result to a 10-digit decimal number, blanks leading zeros, adds decimal point and units (MHz or kHz), and displays it on an HD44780 2x16 LCD. - What components improve high-frequency reliable counting?
Driving the 74F50109 with a fast transistor 2N3960 and using a Schottky diode 1N5712 to prevent transistor saturation enables reliable counting up to about 190–200 MHz.
