Altera returns to its FPGA roots with Stratix 10
Altera has returned to its roots with its latest Stratix 10 FPGA family.
The performance figures of this device are certainly impressive. It reminds me of the days when FPGAs were only ranked by their gate count process technology and clock speed.
This was before suppliers felt they had to re-style FPGAs as configurable processors.
Altera’s capabilities in FPGA architecture design can be seen in the new Stratix 10 devices. Combine this with the 14nm tri-gate process of Intel and you have a truly high-end FPGA.Throw a quad-core ARM Cortex-A53 processor into the mix and you have a top-end configurable processor which Altera will hope can compete for system-on-chip (SoC) slots.
But this latest device is based on traditional programmable logic technology. This is the combination of leading-edge process technology and FPGA architecture design.
The same sort of reasoning is behind Intel’s proposed acquisition of Altera.
Stratix 10 has a new FPGA interconnect fabric, called HyperFlex which tackles the issue of routing delays in high speed chips by adding more registers.
These are what Altera calls “hyper-registers” which it claims increase the options for retiming and pipelining to improve throughput without adding significant cost and power to the chip.
The company claims this doubles the “core logic” performance compared to the previous generation devices.
This is a big FPGA, with up to 5.5 million logic elements, and as we know big FPGAs need something special in the interconnect structure.
As with Xilinx and its interposer-based structure before it, this means a 3D device structure.
Altera makes use of Intel’s proprietary EMIB (Embedded Multi-die Interconnect Bridge) technology.
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