Symtavision, the timing analysis specialist for verifying embedded systems, has developed an integrated, model- and trace-based methodology for Renesas RH850 multi-core MCUs.
The Symtavision/Renesas approach uses Symtavision’s SymTA/S tool suite for model-based timing analysis, optimisation and synthesis, and Symtavision’s powerful TraceAnalyzer for visualising and analysing timing from measurements and simulations.
The methodology involves target tracing to gather fundamental timing data in a realistic environment on the target platform (or one that is predictably related).
Tracing tools from Green Hills Software, Gliwa, iSYSTEM or Lauterbach can be used.
Symtavision’s TraceAnalyzer then processes this data to visualise and validate the internal scheduling of the device and derive metrics such as memory access times, runnable execution times and patterns of sporadic interrupts
This creates RH850 virtual performance models in SymTA/S which allow an early assessment of design alternatives to ensure that all software can execute in real-time and can provide a basis for the continuous validation of model assumptions versus actual implementation.
The RH850 models ensure that key multicore-related design challenges such as optimal software and task partitioning, as well as data allocation and arbitration, are systematically addressed.
For more detail: Symtavision, Renesas develop MCU verification tool