core | Battery Guide

EASILY SCALE ACROSS MULTIPLE PROCESSORS WITH AEON’S GENE-CML5 SUBCOMPACT BOARD

Embedded Boards manufacturer, AAEON, some days ago announced the launch of a new embedded development board, the GENE-CML5 3.5, a subcompact board designed for next-generation industrial, and general Edge AI applications where robustness, ruggedness, and increased processing capacity are required. Designed with an understanding of flexibility and need for scale, unlike the usual fixed, soldered down processor style deployed […]

EASILY SCALE ACROSS MULTIPLE PROCESSORS WITH AEON’S GENE-CML5 SUBCOMPACT BOARD Read More »

HARDKERNEL LAUNCHES A SINGLE-UNIT VERSION OF ITS 32-CORE ODROID-MC1 CLUSTER COMPUTER

Hardkernel has produced a single-unit version of its four-unit, 32-core Odroid-MC1 cluster computer for running Docker Swarm, Build Farm, and other parallel computing applications. The design offers greater flexibility for users to combine Odroid-MC1 Solo units for a “single unit, 2, 3, 4, 5, 6, or n stackable cluster”. The octa-core Odroid-MC1 Solo costs $48. Combing one or more Solo

HARDKERNEL LAUNCHES A SINGLE-UNIT VERSION OF ITS 32-CORE ODROID-MC1 CLUSTER COMPUTER Read More »

AI CORE – ARTIFICIAL INTELLIGENCE ON THE EDGE

The first embedded ultra-compact Artificial Intelligence processing card for on the edge computing UP Bridge the Gap – a brand of AAEON Europe – is proud to launch AI Core: the first embedded ultra-compact Artificial Intelligence processing cards for edge computing. AI Core is a mini-PCIe module powered by Intel® Movidius™ Myriad™ 2 technology. This

AI CORE – ARTIFICIAL INTELLIGENCE ON THE EDGE Read More »

Core Independent Peripherals – Simplify Your Design While Reducing Processor Overhead

Core Independent Peripherals The following Core Independent Peripherals take 8-bit MCU performance to a new level, while requiring no processor overhead. Configurable Logic Cell (CLC) The CLC provides programmable combinational and sequential logic. It also enables the on-chip interconnection of peripherals and I/O, thereby reducing external components, saving code space and adding functionality. Features User-configurable

Core Independent Peripherals – Simplify Your Design While Reducing Processor Overhead Read More »