Imagination lets MIPS take academic plunge
Imagination Technologies’ decision to reveal the inner-most secrets of the MIPS microprocessor architecture to academics could dramatically improve the teaching of electronics in universities.
The MIPS architecture started off as an academic exercise by John Hennessy at Stanford University, and is the subject of a standard educational book by Hennessy and David Patterson.
The core is not exactly the core used by Microchip, but neither is it dumbed-down – it has a memory management unit (MMU), cache controller and JTAG boundary scan, for example.
Called MIPSfpga, it consists of a set of microAptive options selected by Professor David Harris, co-author of the book ‘Digital Design and Computer Architecture’. Professor Sarah Harris, the other author, has developed the MIPSfpga teaching materials.
One of the drivers for option selection, like the inclusion of a cache controller, was to make this a Linux-capable MicroAptive core.
As its name suggests, it is designed to be run in an FPGA, and guides are available to use it on the Digilent Nexys4 (Xilinx Artix-7) and the Terasic DE2 (Altera Cyclone) platforms. Some additional blocks, and driver software, are under development to get Linux up and running on the FPGAs – expected within three months.
To use the core, universities will have to register with Imagination – Harvey Mudd College California, Imperial College London, University College London (UCL), and the University of Nevada, Las Vegas, have already done so.
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