IMEC AND CADENCE TAPE OUT INDUSTRY’S FIRST 3NM PROCESSOR CHIP
Nanoelectronics research institute IMEC and Cadence Design Systems have worked together to produce a tape-out for the industry’s first 64bit processor core as a test chip to be built in a nominal 3nm node. The tape-out project, geared toward advancing 3nm chip design, was completed using extreme ultraviolet (EUV) and 193 immersion (193i) lithography-oriented design rules and Cadence tools. Cadence and Imec have created and […]
IMEC AND CADENCE TAPE OUT INDUSTRY’S FIRST 3NM PROCESSOR CHIP Read More »