UK start-up makes 28nm FD-SOI embedded memory “breakthrough”

SureCore, the UK-based embedded memory process developer, has announced that it has taped out its low power SRAM IP demonstrator chip in STMicroelectronics’ 28nm Fully Depleted Silicon-on-Insulator (FD-SOI) process.“breakthrough”

The device will be used to validate the benefits of the start-up’s patented array control and sensing scheme, which is claimed to lowers active power consumption to deliver greater than 50% power savings compared to current offerings in the same process.

The SRAM IP memory was designed through a combination of detailed analysis and the use of advanced statistical models.

“In post layout simulations the memory showed 75% less power for read cycles and 50% for write cycles. In addition, the technology promises improved leakage performance saving between 20% and 40% depending on operating corner,” said the company.

– See more at: http://www.electronicsweekly.com/news/components/memory/uk-start-up-makes-28nm-fd-soi-embedded-memory-breakthrough-2013-10/#sthash.4M5i0fPB.dpuf

This is a major milestone for the company – the demonstrator device will allow us to take the next steps commercially,” said Paul Wells, sureCore CEO.

Although it is implemented in an FD-SOI process, Wells says the technology is not process specific and will map to both bulk CMOS and FinFET technologies.

“We are currently working closely with partners to implement this in 40nm and 28nm bulk CMOS,” said Wells.

– See more at: http://www.electronicsweekly.com/news/components/memory/uk-start-up-makes-28nm-fd-soi-embedded-memory-breakthrough-2013-10/#sthash.4M5i0fPB.dpuf

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Ibrar Ayyub

I am an experienced technical writer with a Master's degree in computer science from BZU Multan University. I have written for various industries, mainly home automation and engineering. My writing style is clear and simple, and I am skilled in using infographics and diagrams. I am a great researcher and am able to present information in a well-organized and logical manner.

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