Dublin firm’s high speed ADC cuts power in 4G LTE design
Consumer’s voracious appetite for quick access mobile content is obligating the need for high-resolution, high-speed data converters in their mobile internet devices. Whether the transmission pipe is via cellular networks such as LTE or via local networks such as WiFi, the end requirement for the data converter remains largely the same, those being higher bandwidth, higher speed, lower power and ownership costs that the consumer market can tolerate.
Key Consumer Market Requirements
The three key drivers that are pushing the evolution of data converter design are dynamic linearity over certain bandwidths, power consumption and silicon area. Presently, excellent dynamic linearity equivalent to greater than 10.2 ENOB is expected over bandwidths ranging from a few MHz to 80MHz, cellular LTE occupying the lower end, whilst WiFi’s 802.11ac occupies the higher-end. Typical power consumption budgets of less than 15mW are required, whilst silicon area utilization of the order of 0.15mm2 and below is permitted. These are certainly tough requirements and only getting tougher!
What Metrics TO USE
A good figure of merit for comparing the relative performance of data convertors is the energy efficiency metric. This is given simply as:
with Power expressed in mW and Fs representing the sampling rate in Ms/s. In essence this figure of merit captures the energy required per converted bit. The lower the number the better the relative performance. This metric, together with the silicon area used are arguably the two main critical factors that the SoC architect needs to consider when selecting the best in class data convertor for their application, once the input bandwidth requirement is met.
The choice of ADC architecture historically has tracked the end-user application. For example industrial instrumentation, sensing and audio have leveraged from the exceptionally high-precision, low speed over-sampled sigma-delta convertors. At the other end of the spectrum, where very high sampling rate and moderate to high resolutions that are typically required for data infrastructure, pipeline ADC architectures have dominated.
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